Senior PCIe RTL Engineer - AI SoCs

Qualifications

• The ideal candidate should have a Master's degree and 15+ years of experience in ASIC/SoC RTL design with a deep understanding of PCIe standards

Benefits

• This is a full-time position with an annual salary range of $210,000 to $275,000

Responsibilities

• This role involves providing technical leadership in PCIe microarchitecture and execution, developing high-performance buffering and schedulers, and collaborating with various teams for validation and design goals

Full Description

Position: Senior PCIe RTL Engineer for High-Performance AI SoCs

A pioneering hardware startup in California is seeking an experienced RTL Engineer, PCIe.

This role involves providing technical leadership in PCIe microarchitecture and execution, developing high-performance buffering and schedulers, and collaborating with various teams for validation and design goals.

The ideal candidate should havea Master's degree and 15+ years of experience in ASIC/SoC RTL design with a deep understanding of PCIe standards.

This is a full-time position with an annual salary range of $210,000 to $275,000.

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